1. Field of the Invention
The present invention relates to an output buffer, especially an output buffer having two transistors configured perpendicular to one another.
2. Description of the Prior Art
In order to resist noise interference, an output buffer is usually configured at the input or output end of the electronic circuitry. Besides, the electronic circuitry configured with the buffer has the advantages of generating symmetric output waveforms, high alternative current voltage gain, narrow bandwidth and small input capacitance. However, the added buffer might cause some delay in signal transmission.
Please refer to FIGS. 1, 2 and 3. FIG. 1 shows a prior art output buffer 100. FIG. 2 shows the I-V (current-to-voltage) curve of the input/output end I/O in FIG. 1. FIG. 3 shows the output buffer 100 with an additional resistor 30. As shown in FIG. 1, the output buffer 100 comprises a first transistor 12 and a second transistor 22. The second transistor 22 is used as an electrostatic discharge circuit. When the electrostatic discharge (ESD) effect occurs in the output buffer 100, the snapback effect will occur as shown in the I-V curve of the input/output end I/O. However, the ideal I-V curve of the input/output end I/O should be like the dashed part in FIG. 2. To improve the I-V curve of the input/output end I/O, one approach is to turn on the second transistor 22 faster. As shown in FIG. 3, by adding the resistor 30 between the control end of the second transistor 22 and the voltage source VSS, the second transistor 22 can be turned on faster than the first transistor 21. But the resistor 30 occupies extra space, making the layout of the output buffer 100 more difficult.